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Dr. Majid Ahmadi

Category of Study: VLSI and DSP

Office: Room 142, Essex Hall

Email:  ahmadi@uwindsor.ca

Phone Number: (519) 253-3000 extension 2576

Fax: (519) 971-3695


Education:
BSc in Electrical Engineering from Arya Mehr University in Tehran, Iran and DIC and PhD from Imperial College of Science and Technology, London, England, in 1970 and 1977 respectively.

Research Area:
Design Stability and Implementation of 1-D and 2-D Digital Filters, Pattern Recognition and Machine Vision, Neural Network Architectures, and VLSI Implementation.

Research Labs:
Pattern Recognition and Machine Vision Research Lab
VLSI Research Lab
Digital System Lab

Recent Publications:
1. M. Mirhassani, M. Ahmadi, G.A. Jullien “ Low-Power Mixed Signal CVNS Based 64-Bit Adder for Media Signal Processing” IEEE Trans. On VLSI, Vol.16, No.9, Sept. 2008, pp1141-1150.

2. M. Mirhassani, M. Ahmadi, G.A. Jullien “ Robust Low- Sensitivity Adaline Neuron Based on Continuous Valued Number System “ Journal of Analog Integrated Circuits and Signal Processing. Vol. 56, 2008, pp 223-231.

3. F. Chen, T. Kuendiger, S. Erfani, M. Ahmadi “ Design of a Wideband low-power Continuous –Time Σ∆ Modulator in 90 nm CMOS Technology” Journal of Analog Integrated Circuits and Signal Processing, vol. 54, No. 3, March 2008, pp187-199.

4. Songtao Huang, M. Ahmadi, M.A. Sid-Ahmed “A Hidden Markov Model Based Character Extraction Method" Pattern Recognition, vol. 41, 2008, pp 2890-2900.

5. Rashid Rashidzadeh, R. Muscedere, M. Ahmadi and W. C. Miller, “A Delay Generation Technique for,” IEEE Trans. Instrumentation and Measurement, Vol. 58, No.7,. pp 2245-2252,2009

6. A. Mirzaei, M. Rahmati, M. Ahmadi “ A New Method for Hierarchical Clustering Combination” An International Journal of Intelligent Data Analysis” Vol. 12, No.6, 2008, pp549-571.

7. A. H. Namin, K. Leboeuf, R. Muscedere, H. Wu, M. Ahmadi “ High Speed VLSI Implementation of a Type II Optimal Normal Basis Finite Field Multiplier” Accepted for publication in the Proceedings of IET, Circuits, Devices and Systems, Date of acceptance , March 2009.

8. A. H. Namin, H. Wu, M. Ahmadi “ A High Speed Word Level Finite Field Multiplier in F 2**m Using Redundant Representation” IEEE Transactions on Very Large Scale Integration Vol.17, No. 10, Oct. 2009, pp 1546-1550.

9. M.J. Islam, Q. M. J. Wu, M. Ahmadi, M.A. Sid-Ahmed “ Neural Network Based Handwritten Digit Recognition An Experiment and Analysis” . International Journal of Computer and Electrical Engineering, vol. 1, no. 2, pp. 222-228, 2009.

10. R. Rashidzadeh, M. Ahmadi, W.C. Miller “ An All-Digital Self-Calibration Method for Time-to-Digital Converters” Accepted for publication in IEEE Trans. On Instrumentation and Measurement.(Date of acceptance April 15,2009).

11. G. Khodabandehloo, M. Mirhassani, M. Ahmadi “ 16-Level CVNS Memory with Fast ADC” Electronics Letters , Vol. 45, No.16, July 2009, pp822-824.

12. M. Azarmehr, M. Ahmadi, G.A. Jullien “High-Speed and Low-Power Reconfigurable Architectures of 2-digit 2DLNS based Recursive Multipliers” Accepted for publication in the Proceedings of IET on Circuits Devices and Systems, date of acceptance 26/01/2010, 13 manuscript pages.
 

External Affiliations: 

  • Fellow IEE
  • Fellow IEEE
  • Associate Editor for Pattern Recognition and Computer in Electrical Engineering Journal, Regional Editor for the Journal of Circuits, Systems and Computers