Bahar Youssefi, Ph.D. Candidate
Mixed-Signal Neural Network Implementation with Programmable Neuron for Improved Generalization
A very large-scale integration (VLSI) prototype of the reconfigurable neuron is realized for the first time. The activation function of the neuron can be accustomed off-chip by a 2-bit voltage digital to analog converter to provide hard-limit, linear, and variable sigmoid functions. Since the proposed neuron is able to provide adjustable precision, it would be invaluable for neural network applications such as signal prediction which use multi-resolution learning paradigm to increase the efficiency of the system improving the generalization ability of the network.
An area and power-efficient multiplying DAC is realized in TSMC CMOS 0.18$\mu m$ technology. The mixed-signal MDAC is highly modular making it suitable to be used to multiply digital synaptic weights and the analog inputs. The structure reduced the dimensions of the required transistors and decreased the need for weighted current mirrors compared to conventional MDACs.
A modular current-mode synapse-neuron module is implemented using the proposed MDAC and is utilized and tested as a synapse part in a 4-3-2 neural network and as a coefficient multiplier in a FIR filter successfully
Iman Taha, Ph.D. Candidate
Temperature Compensated Relaxation Oscillator for SoC Implementations
This research focuses on analysis, design and implementation of mm-wave RF transceiver in 65nm digital CMOS technology. The transceiver is based on All Digital Phase Lock Loop with application in automotive sensor. This research allows implementation of mm circuits in CMOS technology. This reduces the cost of implementation in automotive sensors. The power efficiency of the the proposed research enables the design under the power hungry RFIC design requirement.
Alex Leigh, Integrated, M.A.Sc.
Hardware Implementation of Mixed-Signal Neural Networks
Siva Balasubramanian, M.A.Sc.
Hardware Implementation of Public Unclonable Functions